1. Field of the Invention
The present invention generally relates to a semiconductor integrated circuit device, and more particularly relates to a semiconductor integrated circuit device that selects one of a first clock signal and a second clock signal having different phases and outputs and supplies the selected one of the first clock signal and the second clock signal to a downstream circuit.
2. Description of the Related Art
In recent years, lithium ion batteries have become commonly used in portable devices such as digital cameras. Generally, it is difficult to measure the remaining battery power of a lithium ion battery based on its voltage. Therefore, for example, the remaining battery power of a lithium ion battery is calculated by measuring and totaling the amounts of charge-and-discharge currents of the lithium ion battery with, for example, a microprocessor (patent document 1).
For example, fuel gauge ICs are used for measuring remaining battery power as described above and are available in the market place. A fuel gauge IC includes a CPU and a memory and calculates remaining battery power by converting measured amounts of charge-and-discharge currents into digital data. Therefore, a fuel gauge IC requires an oscillation circuit to drive a CPU, a memory, and so on.
To save costs and the mounting area on a substrate, an internal oscillation circuit has been commonly used as the oscillation circuit of a fuel gauge IC. Meanwhile, to accurately calculate remaining battery power, it is necessary to accurately calculate time. For this purpose, it is preferable to have an oscillation circuit with an external crystal oscillator. Also, it is more preferable to provide both an internal oscillation circuit and a crystal oscillation circuit in a fuel gauge IC so that a clock signal generated by the internal oscillation circuit or a clock signal generated by the crystal oscillation circuit can be selected and supplied to the CPU according to need.
In a conventional clock signal switching method, clock signals are switched as described below.
FIG. 5 is a drawing used to describe the conventional clock signal switching method. FIG. 5(A) shows a clock signal A, FIG. 5(B) shows a clock signal B, FIG. 5(C) shows an output clock signal, and FIG. 5(D) shows a clock switching signal.
The clock signal A is, for example, output from an internal oscillation circuit, and the clock signal B is, for example, output from a crystal oscillation circuit.
As shown in FIG. 5, since the internal oscillation circuit and the crystal oscillation circuit are not synchronized, there is a phase shift between the clock signals A and B. When the clock switching signal rises at time t1 as shown by FIG. 5(D) and the clock signal A is thereby changed to the clock signal B, an irregular clock signal with a frequency higher than that of the clock signals A and B may be generated as the output clock signal as shown by FIG. 5(C).
[Patent document 1] Japanese Patent Application Publication No. 2001-174534
As described above, in the conventional clock signal switching method, an irregular clock signal with a frequency higher than that of the clock signals A and B may be generated. Such an irregular clock signal may cause, for example, the CPU, which is supplied with the clock signal A or B, to malfunction.
Although it is possible to eliminate the influence of such an irregular clock signal on the CPU by using a program, processing by such a program becomes very complicated.